Microchip added a very cool peripheral called the Configurable Logic Block (CLB) to there new PIC16F13145 microcontroller family. It’s essentially a small FPGA (32 LUTs) that can connect to the internals of the chip.
However, they don’t document how to configure it yourself, only referring you to their online configurator tool that submits jobs to an API that places and routes to LUTs.
The [CLB] Interface does not appear as an SFR in the Register Map and is not directly user-accessible; it is accessible only through a programming system such as Microchip MPLAB® Integrated Development Environment (IDE) that supports programming the CLB. - PIC16F13145 Datasheet
So I decided to reverse engineer it myself!
Broken into 3 parts: